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(R)
VNS3NV04D
"OMNIFET II": FULLY AUTOPROTECTED POWER MOSFET
TYPE VNS3NV04D
(*)Per each device
RDS(on) 120 m (*)
Ilim 3.5 A (*)
Vclamp 40 V (*)
n LINEAR CURRENT LIMITATION n THERMAL SHUT DOWN n SHORT CIRCUIT PROTECTION n INTEGRATED CLAMP n LOW CURRENT DRAWN FROM INPUT PIN n DIAGNOSTIC FEEDBACK THROUGH INPUT
PIN
n ESD PROTECTION n DIRECT ACCESS TO THE GATE OF THE
SO-8
POWER MOSFET (ANALOG DRIVING)
n COMPATIBLE WITH STANDARD POWER
MOSFET DESCRIPTION The VNS3NV04D is a device formed by two monolithic OMNIFET II chips housed in a standard SO-8 package. The OMNIFET II are designed in STMicroelectronics VIPower M0-3 Technology: they are intended for replacement of standard Power MOSFETS from DC up to 50KHz BLOCK DIAGRAM
applications. Built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin.
DRAIN1
DRAIN2
OVERVOLTAGE CLAMP INPUT1 GATE CONTROL
OVERVOLTAGE CLAMP GATE CONTROL INPUT2
OVER TEMPERATURE
LINEAR CURRENT LIMITER
LINEAR CURRENT LIMITER
OVER TEMPERATURE
SOURCE1
SOURCE2
February 2003
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VNS3NV04D
ABSOLUTE MAXIMUM RATING
Symbol VDSn VINn IINn RIN MINn IDn IRn VESD1 VESD2 Ptot Tj Tc Tstg Parameter Drain-source Voltage (VINn=0V) Input Voltage Input Current Minimum Input Series Impedance Drain Current Reverse DC Output Current Electrostatic Discharge (R=1.5K, C=100pF) Electrostatic Discharge on output pins only (R=330, C=150pF) Total Dissipation at Tc=25C Operating Junction Temperature Case Operating Temperature Storage Temperature Value Internally Clamped Internally Clamped +/-20 220 Internally Limited -5.5 4000 16500 4 Internally limited Internally limited -55 to 150 Unit V V mA A A V V W C C C
CONNECTION DIAGRAM (TOP VIEW)
SOURCE 1 INPUT 1 SOURCE 2 INPUT 2
1
8
DRAIN 1 DRAIN 1 DRAIN 2
4
5
DRAIN 2
CURRENT AND VOLTAGE CONVENTIONS
IIN1 IIN2 VIN2
RIN1
INPUT 1 DRAIN 1 ID2 INPUT 2 SOURCE 1 DRAIN 2 SOURCE 2
ID1
VIN1
RIN2
VDS1
VDS1
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THERMAL DATA
Symbol Rthj-lead Rthj-amb Parameter Thermal Resistance Junction-lead (per channel) Thermal Resistance Junction-ambient MAX MAX Value 30 80(*) Unit C/W C/W
(*) When mounted on a standard single-sided FR4 board with 50mm2 of Cu (at least 35 m thick) connected to all DRAIN pins of the relative channel.
ELECTRICAL CHARACTERISTICS (-40C < Tj < 150C, unless otherwise specified) (Per each device) OFF
Symbol VCLAMP VCLTH VINTH IISS VINCL IDSS Parameter Drain-source Clamp Voltage Drain-source Clamp Threshold Voltage Input Threshold Voltage Supply Current from Input Pin Input-Source Clamp Voltage Zero Input Voltage Drain Current (VIN=0V) Test Conditions VIN=0V; ID=1.5A VIN=0V; ID=2mA VDS=VIN; ID=1mA VDS=0V; VIN=5V IIN=1mA IIN=-1mA VDS=13V; VIN=0V; Tj=25C VDS=25V; VIN=0V 6 -1.0 Min 40 36 0.5 100 6.8 2.5 150 8 -0.3 30 75 Typ 45 Max 55 Unit V V V A V A
ON
Symbol RDS(on) Parameter Static Drain-source On Resistance Test Conditions VIN=5V; ID=1.5A; Tj=25C VIN=5V; ID=1.5A Min Typ Max 120 240 Unit m
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ELECTRICAL CHARACTERISTICS (continued) (Tj=25C, unless otherwise specified) DYNAMIC
Symbol gfs (*) COSS Parameter Forward Transconductance Output Capacitance Test Conditions VDD=13V; ID=1.5A VDS=13V; f=1MHz; VIN=0V Min Typ 5.0 150 Max Unit S pF
SWITCHING
Symbol td(on) tr td(off) tf td(on) tr td(off) tf (dI/dt)on Qi Parameter Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Turn-on Current Slope Total Input Charge Test Conditions VDD=15V; ID=1.5A Vgen=5V; Rgen=RIN MINn=220 (see figure 1) VDD=15V; ID=1.5A Vgen=5V; Rgen=2.2K (see figure 1) VDD=15V; ID=1.5A Vgen=5V; Rgen=RIN MINn=220 VDD=12V; ID=1.5A; VIN=5V Igen =2.13mA (see figure 5) Min Typ 90 250 450 250 0.45 2.5 3.3 2.0 4.7 8.5 Max 300 750 1350 750 1.35 7.5 10.0 6.0 Unit ns ns ns ns s s s s A/s nC
SOURCE DRAIN DIODE
Symbol VSD (*) trr Qrr IRRM Parameter Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Test Conditions ISD=1.5A; VIN=0V ISD=1.5A; dI/dt=12A/s Min Typ 0.8 107 37 0.7 Max Unit V ns C A
VDD=30V; L=200H Reverse Recovery Current (see test circuit, figure 2)
PROTECTIONS (-40C < Tj < 150C, unless otherwise specified)
Symbol Ilim tdlim Tjsh Tjrs Igf Eas Parameter Drain Current Limit Step Response Current Limit Overtemperature Shutdown Overtemperature Reset Fault Sink Current Single Pulse Avalanche Energy Test Conditions VIN=5V; VDS=13V VIN=5V; VDS=13V Min 3.5 Typ 5 10 150 135 10 100 175 200 Max 7 Unit A s C C mA mJ
VIN=5V; VDS=13V; Tj=Tjsh starting Tj=25C; VDD=24V VIN=5V; Rgen=RIN MINn=220; L=24mH (see figures 3 & 4)
15
20
(*) Pulsed: Pulse duration = 300s, duty cycle 1.5%
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PROTECTION FEATURES During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50KHz. The only difference from the user's standpoint is that a small DC current IISS (typ. 100A) flows into the INPUT pin in order to supply the internal circuitry. The device integrates: - OVERVOLTAGE CLAMP PROTECTION: internally set at 45V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. - LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to Ilim whatever the INPUT pin voltage. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. - OVERTEMPERATURE AND SHORT CIRCUIT PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 C, a typical value being 170 C. The device is automatically restarted when the chip temperature falls of about 15C below shut-down temperature. - STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin will fall to 0V. This will not however affect the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.
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Fig.1: Switching Time Test Circuit for Resistive Load
VD Rgen Vgen
ID 90%
tr td(on)
10% td(off)
tf t
Vgen
t
Fig.2: Test Circuit for Diode Recovery Times
A D I
A
FAST DIODE
OMNIFET
S B
L=100uH B
220 Rgen
I
D
VDD
OMNIFET
S
Vgen
8.5
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VNS3NV04D
Fig. 3: Unclamped Inductive Load Test Circuits Fig. 4: Unclamped Inductive Waveforms
RGEN VIN PW
Fig. 5: Input Charge Test Circuit
VIN
1
1
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VNS3NV04D
Source-Drain Diode Forward Characteristics
Vsd (mV)
1100 1050
Static Drain Source On Resistance
Rds(on) (mohms)
1000 900
Tj=-40C
Vin=0V
1000 950 900 850 800 750 700 650 600 0 1 2 3 4 5 6 7 8 9 10 11 12 800 700 600 500 400 300
Vin=2.5V
Tj=25C
Tj=150C
200 100 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55
Id (A)
Id(A)
Derating Curve
Static Drain-Source On resistance Vs. Input Voltage
Rds(on) (mohms)
300 275 250 225 200 175 150 125 100 75 50 25 0 3 3.5 4 4.5 5 5.5 6 6.5
Id=3.5A Id=1A
Tj=150C
Tj=25C Tj=-40C
Id=3.5A Id=1A Id=3.5A Id=1A
Vin(V)
Static Drain-Source On resistance Vs. Input Voltage
Rds(on) (mohms)
250 225 200 175 150 125 100 75 50
Transconductance
Gfs (S)
11 10
Id=1.5A
9 8 7
Vds=13V
Tj=-40C Tj=25C Tj=150C
Tj=150C
6 5 4 3
Tj=25C
2
Tj=-40C
25 0 3 3.5 4 4.5 5 5.5 6 6.5
1 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Vin(V)
Id (A)
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VNS3NV04D
Static Drain-Source On Resistance Vs. Id
Rds(on) (mohms)
250 225
Transfer Characteristics
Idon (A)
6 5.5
Vin=5V
200 175 150 125 100 75 50 25 0 0 0.5 1 1.5 2 2.5 3 3.5 4
5
Vds=13.5V
Tj=150C
4.5 4
Tj=150C
3.5 3
Tj=25C
2.5 2 1.5
Tj=-40C
Tj= - 40C
Tj=25C
1 0.5 0 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
Id (A)
Vin (V)
Turn On Current Slope
di/dt(A/us)
5 4.5 4 3.5 3 2.5 2 1.5 1
Turn On Current Slope
di/dt(A/usec)
1.75
Vin=5V Vdd=15V Id=1.5A
1.5
1.25 1
Vin=3.5V Vdd=15V Id=1.5A
0.75 0.5
0.25
0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500
Rg(ohm)
Rg(ohm)
Input Voltage Vs. Input Charge
Vin (V)
9 8 7 6 5 4 3 2 1 0 0 1 2 3 4 5 6 7 8 9 10 11
Turn off drain source voltage slope
dv/dt(V/usec)
300 275
Vds=1V Id=1.5A
250 225 200 175 150 125 100 75 50 25 0 0 250 500 750 1000 1250 1500
Vin=5V Vdd=15V Id=1.5A
2000 1750 2250
2500
Qg (nC)
Rg(ohm)
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VNS3NV04D
Turn Off Drain-Source Voltage Slope
dv/dt(V/usec)
300 275 250 225 200 175 150 125 100 75 50 100 25 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 50 0 5 10 15 20 25 30 35 150 200
Capacitance Variations
C(pF)
350
Vin=3.5V Vdd=15V Id=1.5A
300
f=1MHz Vin=0V
250
Rg(ohm)
Vds(V)
Switching Time Resistive Load
t(usec)
4 3.5 3 2.5 2
Switching Time Resistive Load
t(nsec)
900 800
Vdd=15V Id=1.5A Vin=5V
td(off)
700
tr tr
Vdd=15V Id=1.5A Rg=220ohm
600 500
tf
1.5
400
td(off)
300
1 0.5 0 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 0 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
td(on)
200 100
tf td(on)
Rg(ohm)
Vin(V)
Output Characteristics
Id (A)
5 4.5 4 3.5 3 2.5 2 1.5 1
Vin=5V Vin=4V
Normalized On Resistance Vs. Temperature
Rds(on) (mOhm)
4
3.5
3
Vin=3V
Vin=5V Id=1.5A
2.5
2
1.5
1
0.5 0 0 1 2 3 4 5 6 7 8 9 10
0.5 -50 -25 0 25 50 75 100 125 150 175
Vds (V)
Tc )C)
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VNS3NV04D
Normalized Input Temperature
Vinth (V)
2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 175
Threshold
Voltage
Vs.
Normalized Current Temperature
Ilim (A)
10 9
Limit
Vs.
Junction
Vds=Vin Id=1mA
8 7 6 5 4 3 2 1 0 -50 -25
Vin=5V Vds=13V
0
25
50
75
100
125
150
175
Tc (C)
Tc (C)
Step Response Current Limit
Tdlim(usec)
13 12.5 12 11.5 11 10.5 10 9.5 9 8.5 8 7.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5
Vin=5V Rg=220ohm
Vdd(V)
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VNS3NV04D
SO-8 MECHANICAL DATA
mm. DIM. MIN. A a1 a2 a3 b b1 C c1 D E e e3 F L M F 3.8 0.4 4.8 5.8 1.27 3.81 4.0 1.27 0.6 8 (max.) 0.14 0.015 5.0 6.2 0.65 0.35 0.19 0.25 0.1 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 0.188 0.228 0.050 0.150 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 inch
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VNS3NV04D
SO-8 TUBE SHIPMENT (no suffix)
B
C
A
Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1)
All dimensions are in mm.
100 2000 532 3.2 6 0.6
TAPE AND REEL SHIPMENT (suffix "13TR") REEL DIMENSIONS
Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) 12 4 8 1.5 1.5 5.5 4.5 2
End
All dimensions are in mm.
Start Top cover tape 500mm min Empty components pockets saled with cover tape. User direction of feed 500mm min No components Components No components
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VNS3NV04D
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2003 STMicroelectronics - Printed in ITALY- All Rights Reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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